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Described here is a new style, cardiac pacing system—an implantable pacemaker with the programmability of parameters. It consists of a programmer and an implantable pacemaker with a digital memorial element. Whenever an adjustment is neccessary, the pacemaker can be manipulated to a new stable state with the programmer emitting a series of coded pulses toward it. The process of adjustment is quick and noninvasive.The pacemaker is made by combining a CMOS circuit with monolithic integralted circuits into... Described here is a new style, cardiac pacing system—an implantable pacemaker with the programmability of parameters. It consists of a programmer and an implantable pacemaker with a digital memorial element. Whenever an adjustment is neccessary, the pacemaker can be manipulated to a new stable state with the programmer emitting a series of coded pulses toward it. The process of adjustment is quick and noninvasive.The pacemaker is made by combining a CMOS circuit with monolithic integralted circuits into a hybrid circuit, which is characterized by low dissipation, light weight and small size. 本文介紹一種新型起搏系統——參數可調的埋藏式起搏器——的設計方案及實施技術.它由一個體外操縱器及一只帶有數字記憶(由CMOS電路組成)元件的埋藏式起搏器所組成.無論在起搏器埋植前或后,當需要調節參數(包括接通或關斷電源)時,可使用體外操縱器向起搏器發射一組編碼的磁脈沖,這組脈沖被埋藏式起搏器感受,記憶,從而控制起搏參數到一新的指定的狀態,并將這種狀態一直保持下去直到進行再次調節. 由CMOS電路及混合型集成電路組成的起搏器具有功耗低、體積小、重量輕的特點.十個月的臨床應用表明:調節靈活,性能可靠,療效良好. In electron watches, power consumption required is generally very low. For this purpose, the present article analyses the power consumption in the CMOS quartz oscillators under the through current and loading conditions, and the method of seletion of paramatcrs of the oscillator and the measures to be adopted are also presented. 電手表要求功耗甚微。為此,本文分析了CMOS晶體振蕩器由導通電流及負載引起的功耗,并提出如何選擇參數及應采取的措施。 Until now, the history of computer development has always been divided according to the advent of new devices introducing striking changes to main frame. However, once the multiple valued logic system is realized and their theories are applied, we shall have a high efficient computer architecture that will be bring a higher level to the computer technology.The advent of DYL integrated circuit[1,2] provides a new hope for realizing the possibility as mentioned above in our country.In this paper, we propose that... Until now, the history of computer development has always been divided according to the advent of new devices introducing striking changes to main frame. However, once the multiple valued logic system is realized and their theories are applied, we shall have a high efficient computer architecture that will be bring a higher level to the computer technology.The advent of DYL integrated circuit[1,2] provides a new hope for realizing the possibility as mentioned above in our country.In this paper, we propose that a linear AND-OR gate of Multiple Elemental Logic (DYL) is an excellent AND-OR gate of multiple valued logic. If combined with other circuits, a new multiple valued logic circuit will be constructed (MV-DYL for short). By the comparison and experiment it is proved that the MV-DYL circuits can obtain higher information density than binary DYL circuits under like condition of power-delay product, and it has more advantages of simpler structure, easier realization and higher reliability than ternary CMOS and MV-I2L circuits. 以往科學家們總是以新器件的出現,及隨之使整機產生了驚人的變化來劃分計算機發展歷史。然而一旦多值邏輯系統付諸實現,多值邏輯學說得到應用,這種高效率的計算機結構的出現,將可能使計算機技術進入更高的水平。我國DYL集成電路的發明為實現上述目標提供了新的希望。 本文指出,多元邏輯中的線性“與或”門本質上就是一種很好的多值邏輯“與或”門。它與其他電路配合可以構成一種新的多值邏輯電路(簡稱為MV-DYL)。通過比較和實驗證明,MV-DYL電路在與二值DYL電路相同的功耗-時延積條件下,可以獲得更高的信息密度。MV-DYL電路比三值CMOS和多值I~2L電路結構簡單、容易制作和可靠性高。
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